Various solutions have been proposed for allocating memory resources to clients in a computer cluster. For example, U.S. Pat. No. 8,266,238, whose disclosure is incorporated herein by reference, describes an apparatus including a physical memory configured to store data and a chipset configured to support a virtual machine monitor (VMM). The VMM is configured to map virtual memory addresses within a region of a virtual memory address space of a virtual machine to network addresses, to trap a memory read or write access made by a guest operating system, to determine that the memory read or write access occurs for a memory address that is greater than the range of physical memory addresses available on the physical memory of the apparatus, and to forward a data read or write request corresponding to the memory read or write access to a network device associated with the one of the plurality of network addresses corresponding to the one of the plurality of the virtual memory addresses.
U.S. Pat. No. 8,082,400, whose disclosure is incorporated herein by reference, describes firmware for sharing a memory pool that includes at least one physical memory in at least one of plural computing nodes of a system. The firmware partitions the memory pool into memory spaces allocated to corresponding ones of at least some of the computing nodes, and maps portions of the at least one physical memory to the memory spaces. At least one of the memory spaces includes a physical memory portion from another one of the computing nodes.
U.S. Pat. No. 8,544,004, whose disclosure is incorporated herein by reference, describes a cluster-based operating system-agnostic virtual computing system. In an embodiment, a cluster-based collection of nodes is realized using conventional computer hardware. Software is provided that enables at least one VM to be presented to guest operating systems, wherein each node participating with the virtual machine has its own emulator or VMM. VM memory coherency and I/O coherency are provided by hooks, which result in the manipulation of internal processor structures. A private network provides communication among the nodes.